第1篇 半導(dǎo)體工藝整合工程師崗位職責(zé)
崗位職責(zé):1.射頻半導(dǎo)體工藝持續(xù)改進(jìn):性能提升、良率提升;2.半導(dǎo)體工藝相關(guān)的失效分析及解決方案驗證。任職要求:1.深厚的半導(dǎo)體材料、器件、工藝背景知識。2.有cmossoi工藝或gaasinpgan工藝的開發(fā)工作經(jīng)驗,熟悉半導(dǎo)體生產(chǎn)各道工藝的流程和運(yùn)作機(jī)理。3.深刻理解fethbtphemt等器件的工作機(jī)理,具有失效分析、器件性能改進(jìn)和良率提升的能力。4.了解半導(dǎo)體工廠的運(yùn)行流程,具有較強(qiáng)的向外溝通和組織能力。
第2篇 工藝整合工程師崗位職責(zé)任職要求
工藝整合工程師崗位職責(zé)
職責(zé)描述:
1. 負(fù)責(zé)40/28nm cmos邏輯、mram器件性能分析和優(yōu)化;
2. 負(fù)責(zé)40/28nm cmos邏輯,mram器件的可靠性問題分析,包括對失效模型的分析,并給出解決方案;
3. 與代工廠協(xié)同工作,設(shè)計40/28nm cmos、mram有關(guān)的testkey,并對器件進(jìn)行失效分析;
任職要求:
1.微電子及相關(guān)專業(yè)碩士以上學(xué)歷;
2.五年以上半導(dǎo)體器件開發(fā)經(jīng)驗,精通cmos器件性能與可靠性優(yōu)化和測試;(有存儲芯片研發(fā)經(jīng)驗者優(yōu)先)
3.熟練掌握半導(dǎo)體芯片開發(fā)流程和方法;
4.有sram或嵌入式nvm經(jīng)驗及與代工廠合作經(jīng)驗者優(yōu)先;
5.具有良好的工作協(xié)調(diào)能力,溝通能力和團(tuán)隊精神。良好的文檔編輯與處理能力。
工藝整合工程師崗位
第3篇 工藝整合工程師崗位職責(zé)
工藝整合工程師 job description:
new technology development and new products ramp-up in fab. mass production yield maintenance and continuous improvement. interfaces with business units, atd, process modules, quality, manufacturing, a/t sites for problem solving, cost reduction, productivity and process robustness.
basic qualifications:
-2019 bachelor degree or above; microelectronics/electronics/material/chemistry/physics or equivalent;
-candidates with semiconductor wafer fabrication e_perience are preferred;
-good ownership and accountability;
-good team player;
-fluent in english--written and verbal. job description:
new technology development and new products ramp-up in fab. mass production yield maintenance and continuous improvement. interfaces with business units, atd, process modules, quality, manufacturing, a/t sites for problem solving, cost reduction, productivity and process robustness.
basic qualifications:
-2019 bachelor degree or above; microelectronics/electronics/material/chemistry/physics or equivalent;
-candidates with semiconductor wafer fabrication e_perience are preferred;
-good ownership and accountability;
-good team player;
-fluent in english--written and verbal.